- CPU
- Digital Signal Processor (DSP) - Signal Processing 160 Instructions - 16 / 32 / 48-bit Variable Length Instructions - MAC with 17 bits X 17 bits Multipliers
- 32kB FLASH (Including 2kB EEPROM)
- 2kB RAM
- 1kB for SRAM Code Fetch (Timing Critical Function) - 1kB for Data, Stack & Etc.
- Operating Voltage : 2.2V ~ 3.6V
- Operating Frequency
- Max. 24MHz @+3.0V & FALSH - Max. 48MHz @+3.0V & RAM
- Internal RING OSC with Calibration Function
- 24MHz (±1%) @ +2.7~+3.6V (±1%) - 32kHz (±10%) @ +1.62V (±10%) : Low Power OSC
- Supporting ISP/IAP/MDS
- Five 16-bit Timer/Counters
- RTC(BCD type)
- 32-bit Programmable Watchdog Timer
- 1-Channel I2S Communication (Master)
- 2-Channel I2C Communication (Master/Slave)
- 1-channel SPI Communication (Master/Slave)
- 2-channel UART Communication
- 21-channel (SEJONG200M), 14-channel (SEJONG210M), 8-channel (SEJONG220M) Differential OP-AMP + 12-bit ADC (24-bit resolution)
- 32-channel (SEJONG200M), 27-channel (SEJONG210M), 17-channel (SEJONG220M)
8-bit High Speed WPM for LED Dimming
- Remote Controller (8X8)
- 4 COM X 32Seg. (SEJONG200M/210M),
4 COM X 24Seg. (SEJONG220M), LCD Driving Controller
- 28 Interrupt Sources
- Timer0/1/2/3/4, WDT, SPI, I2C 0/1, UART 0/1, I2S, ADC, RTC - 14 External Interrupt Source : Both Edge/Level - Two-level interrupt priority
- Reset Sources
- On-chip Power-On-Reset (POR) - External Reset - Low Voltage Detector Reset (LVR) - Watchdog Timer Reset
- Power Down Wake-up Sources
- Reset Sources + 14 External interrupt (Both Lvevls) - WDT interrupt
- Power Consumption
- Active Current : Max 1mA @3.3V, 2MHz - Idle Current : Max 0.5mA @3.3V, 2MHz - Stop Current : Max 5uA @3.3V
- E.S.D. Protection up to 2,000V
- Latch-up Protection Up to ±200mA
- Package
- 88-MLF (9mm X 9mm) : SEJONG200M - 68-MLF (8mm X 8mm) : SEJONG210M - 48-MLF (6mm X 6mm) : SEJONG220M
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